EMERALD TECHNOLOGIES                                                                                                                                                                                            2243 Lundy Ave   |   San Jose, CA 95131   |   925-401-2004

pre- and post-layout solutions using leading-edge simulation tools

Signal integrity

The strict tolerances of current high-speed interfaces require design-time knowledge of signaling behavior and trade-offs. Simulation provides functional insight into the signaling channel so they can be designed correctly from the get-go.

High-Speed Serial Channel Modeling: 56G PAM-4, PCIe, USB, 25G Ethernet, SAS, Fiber Channel.

High-Speed Memory Simulation: DDR4/5, Topology Options, Waveform Integrity.

PCB Design Stackup and Material Analysis.

Tools: Ansys HFSS and SIwave, Keysight ADS, Synopsys HSpice, and Hyperlynx.

Power Integrity

Your board’s Power Distribution Network (PDN) increasingly requires analysis similar to Signal Integrity. Power planes, power traces and ground returns require low DC resistance and AC impedance to properly feed today’s GHz parts and interfaces.

PDN Visualization and Optimization - Simulation and 3D modeling of your board’s PDN to optimize power planes and structures for power delivery to each load within the system.

DC and AC response of Power planes - Verify that PDN voltage drop and impedance targets are met for the system.

AC Decoupling Analysis - Decoupling capacitor value optimization to meet target PDN impedance. Part count minimization to lower BOM cost.

GET IN TOUCH WITH US TO BOOK A PRESENTATION

lEARN MORE ABOUT SIGNAL AND POWER INTEGRITY IN OUR BLOG